Electronic circuitry provides complex functionality that is proving ever more useful. In one common form, circuitry is formed on a semiconductor or other substrate using micro-fabrication processing technology. Modern processing technology often permits circuits to be constructed with feature dimension sizes as small as below one micron (1 μm or 10−6 meters) for some processes. Accordingly, circuitry is becoming ever more integrated with advances in processing technology.
Typical circuitry with such small feature dimension sizes are not designed to carry large amounts of current. So long as the voltage range at any given node does not extended out of its designed range, these currents remain relatively low and the circuitry will typically operate as designed. However, if the voltage range at any given node extends outside of its designed range, a condition of Electrical OverStress (EOS) may occur.
For example, most common semiconductor fabrication processes use substrate or bulk semiconductor with different dopants implanted into certain regions of the substrate. These implant regions define unique voltage characteristics that are important or essential for circuit functionality. Thus, EOS experienced at any of the implant regions may adversely impact circuit performance. Another area where EOS may adversely affect performance is in the interlayer dielectrics, which have voltage limitations as well. Driving a circuit outside of its normal operating range can often disable performance of the circuit, reduce the operational lifetime of the circuit, or even immediately destroy the circuit. EOS can take many forms, but commonly takes the form of Electro Static Discharge (ESD) events.
Many current dissipation circuits have been designed that are suitable for dissipating current to or from corresponding critical circuit nodes in order to provide protection to corresponding circuitry. Such current dissipation circuits often take the form of Silicon or Semiconductor Controlled Rectifiers (SCRs). When the monitored circuit node for a particular SCR has a normal voltage applied thereon, the SCR has little impact on the operation of the corresponding protected circuitry. However, when the monitored circuit node exceeds the normal operating voltage range, the SCR draws or provides current as appropriate to thereby prevent excessive currents from being experienced within the protected circuitry.
Conventionally, SCR technology involves dual well technology using both n-wells and p-wells. This often involves more processing steps as compared to using single well technology such as would be employed if using only n-wells or if using only p-wells. Furthermore, there are situations in which the normal operating range of a critical circuit node is exceeded, yet for which it is desirable to draw only a little current through the SCR. For instance, some protected circuitry is designed to operate and provide some functionality in an alternative operating mode if the polarity of the voltage supplies provided to the circuit is reversed.